1) Field of the Invention
The present invention relates to a liquid crystal display cell and a liquid crystal display that are characterized in a positional relationship between a data line and either a pixel electrode or a common electrode and in their shapes. Particularly, the present invention relates to a liquid crystal display cell and a liquid crystal display of an in-plane-switching type, respectively.
2) Description of the Related Art
A twisted nematic (hereinafter, “TN”) liquid crystal display cell, which has a pixel electrode and a common electrode that are disposed so as to sandwich a liquid crystal layer, is well known, while an in-plane-switching (hereinafter, “IPS”) liquid crystal display cell is proposed and is being put to practical use. The IPS liquid crystal display cell applies an electric field to a liquid crystal molecule in a direction parallel to a substrate, thereby to control the orientation of the liquid crystal molecule. Based on this mechanism, the IPS liquid crystal display cell has voltage holding characteristics and wide view field angle superior to those of the TN liquid crystal display cell that applies an electric field in a direction perpendicular to a substrate.
FIGS. 12A and 12B are schematic diagrams of a partial configuration of a conventional IPS liquid crystal display cell. FIG. 12A is a top plan view of this IPS liquid crystal display cell. FIG. 12B is a cross-sectional view of this configuration cut along a line A-A in FIG. 12A. According to the conventional IPS liquid crystal display cell, as illustrated in FIG. 12A, a pixel electrode 104 and a common electrode 103 extend in parallel. The 104 pixel electrode is connected to a source electrode 121 of a lower layer via a through-hole 122 formed in a planarizing layer 113. The common electrode 103 is connected to a power supply line (not illustrated). The planarizing layer 113 is formed to cover an upper surface of a gate insulating layer 112, a data line 102 formed on the gate insulating layer 112, and a channel arrangement (not illustrated) of a thin-film transistor (TFT) 110 formed on the gate insulating layer 112.
The gate insulating layer 112 is formed to cover an upper surface of an array substrate 111, and a scan line 105 formed on the array substrate 111. The scan line 105 also functions as a gate electrode of the TFT 110. The data line 102 is disposed so that a portion of the data line in its longitudinal direction is right below the common electrode 103 as illustrated in the drawings. A protrusion part of the data line 102 also functions as a drain electrode of the TFT 110. Therefore, the TFT 110 functions as a switching element that is turned ON or OFF based on a voltage of the scan line 105, that is, a scan signal. When the TFT 110 is ON, a voltage of the data line 102, that is, a pixel signal, is supplied to the pixel electrode 104 via the source electrode 121 and the through-hole 122.
In FIG. 12A, an auxiliary wire 106 is positioned on the same layer as the scan line (i.e., gate electrode) 105, and forms a capacitor with the pixel electrode 104 on the upper layer to hold the TFT 110 in the ON state. With the above arrangement, a voltage can be applied in one direction to a liquid crystal that is positioned between the common electrode 103 and the pixel electrode 104. As a result, the orientation of the liquid crystal in the in-plane direction can be achieved. For simplification, FIGS. 12A and 12B do not illustrate a cross-sectional view of the TFT 110, a liquid crystal layer positioned on the common electrode 103 and the pixel electrode 104, a color filter positioned on the liquid crystal layer, and members that are essential to construct the liquid crystal display cell on a counter substrate that fixes the color filter.
As illustrated in FIG. 12B, the common electrode 103 and the pixel electrode 104 are formed on the planarizing layer 113 with a predetermined distance. However, according to this configuration, an electric field is generated between the common electrode 103 and the data line 102 that is positioned on the layer lower. Moreover, an electric field is generated even between the common electrode 103 and the pixel electrode 104. Particularly, a disturbance of the electric field becomes remarkable in the vicinity of the pixel electrode where a potential variation occurs according to a pixel signal. As this disturbance affects the orientation of the liquid crystal, the picture quality is lowered as a result. Therefore, as illustrated in FIG. 12B, a configuration of shielding the electric field generated between the pixel electrode 104 and the data line 102 is proposed. The common electrode 103 that has a larger width than that of the data line 102 is formed right above the data line 102 (see, Japanese Patent Application Laid-open No. H11-119237).
As explained above, FIGS. 12A and 12B illustrate the configurations of the liquid crystal display cells. A known method of forming the planarizing layer (see Japanese Patent Application Laid-open No. 2002-107744) as a technique relevant to the present invention will be described. In FIGS. 13A and 13B, a reference numeral 201 denotes a glass substrate, 202 denotes a gate electrode, and 203 denotes a gate insulating layer. A reference numeral 204 denotes a semiconductor layer, 205 denotes an ohmic contact layer, 206 denotes a source electrode, and 207 denotes a drain electrode. A reference numeral 208 denotes a passivation film, 209 denotes a planarizing film, 209b and 210a denote grooves, and 210 denotes a pixel electrode. A reference numeral 220 denotes a photo mask, 220a denotes an aperture, 220b denotes a slit, 220c denotes a slit section, and 220d denotes a shielding section. Reference numerals 230 and 231 denote light. FIG. 13A illustrates a state that the flat film 209 is exposed. FIG. 13B illustrates a state that the pixel electrode 210 is formed after etching the planarizing film 209.
In order to increase an irregular reflection of light by the pixel electrode 210 effective in a reflecting liquid crystal display device, this method of forming the planarizing film 209 has a main object of forming an uneven surface on the pixel electrode 210 in a simple method. For this purpose, an uneven surface needs to be formed on the planarizing film 209 that is positioned beneath the pixel electrode 210. This formation method has the following characteristics. A plurality of slits 220b each having a width of which resolution is smaller than an exposure resolution are provided on the photo mask 220 that is used in a process of exposing the planarizing film 209. By utilizing a diffraction phenomenon (i.e., interference fringe) of light due to the slit 220b, electrical energy having different sizes between the fringes is irradiated onto the surface of the planarizing film 209.
However, the conventional IPS liquid crystal display cell illustrated in FIG. 12 (hereinafter, “first conventional cell”) requires the following. In order to sufficiently shield the electric field that is generated between the data line 102 and the pixel electrode 104, the amount of the electric field directed from the data line 102 toward the common electrode needs to be large. In other words, the common electrode 103 needs to have a larger width than the width of the data line 102. However, the increase in the width of the common electrode 103 causes the aperture ratio of the liquid crystal display cell to decrease.